histcomp:altair_8800

Altair 8800

A kit-based home computer originally released in 1975 and largely credited with sparking the home computer revolution.

Much like mainframes and minicomputers of the time, its front panel featured a number of toggle switches for entering programs and examining memory. The data LEDs show the contents of the CPU's incoming data bus. These lines are pulled up on a memory write regardless of the data being written. Likewise, the address LEDs display the contents of the address bus or two copies of the I/O port number on I/O instructions.

There are also a series of status lights. These sample the 8080's status pins directly at the beginning of each machine (bus) cycle.

  • MEMR: the memory bus will be used for memory read data
  • INP: the address bus contains the address of an input device
  • M1: the CPU is in the first (fetch) machine cycle of the instruction
  • OUT: the address bus contains the address of an output device
  • HLTA: a halt instruction has been executed and acknowledged
  • STACK: the address bus holds SP's push-down address
  • WO: the current bus operation is a write
  • INT: an interrupt request has been acknowledged

There are also four indicator LEDs:

  • INTE: an interrupt is enabled
  • PROT: the current memory page is protected 1)
  • WAIT: the CPU is in a wait state
  • HLDA: a hold has been acknowledged

Switches A15–A8 also serve as sense switches. These are typically used for specifying options to bootloaders. The status of the sense switches can be read with in ffh.

The SIO provides a single serial in/out port. By default, it is assigned to I/O ports 0 (control) and 1 (data).

7 6 5 4 3 2 1 0
low output device ready not used data available (a data word is buffered) data overflow (a new word was received before the previous was passed to the accumulator) framing error (no valid stop bit) parity error (received parity does not agree with selected parity) transmit buffer empty (previous word has been transmitted and a new word may be buffered)
high output device not ready not used input device not ready

The control channel can also be written to to enable or disable interrupts. Bit 0 controls the input interrupt, and bit 1 controls the output interrupt. Bits 2–7 are ignored.

Altair32 is probably the most aesthetically appealing simulator available. In addition to its fully-functional front panel, it ships with several images of period software, among them 4K and 8K versions of Altair BASIC. Unfortunately, we have so far been unable to run BASIC or even the kill-the-bit game.

Much more promising is the Altair-Duino. As the name implies, it is a hardware replica kit based around an Arduino Due.

; originally by Dean McDaniel, 1975-15-05
; sourced from https://altairclone.com/downloads/killbits.pdf
        org 0
        lxi h,0    ; init counter
        mvi d,80h  ; set up initial display bit
        lxi b,0eh  ; higher value = faster
beg:    ldax d     ; display bit pattern on upper 8 address lights
        ldax d
        ldax d
        ldax d
        dad b      ; increment display counter
        jnc beg
        in ffh     ; input data from sense switches
        xra d 
        rrc        ; rotate display right
        mov d,a    ; move data to display register
        jmp beg    ; repeat
        end
        
; octal assembly
; 000: 041 000 000 026 200 001 016 000
; 010: 032 032 032 032 011 322 010 000
; 020: 333 377 252 017 127 303 010 000


1)
What constituted a memory page depended on the particular memory board. Not many actually implemented this functionality.
  • histcomp/altair_8800.txt
  • Last modified: 2024-04-29 22:59
  • by asdf